Method and device for determining the ratio between an RC time constant in an integrated circuit and a set value

ABSTRACT

The invention relates to a method and a device for determining the ratio of the RC time constant of at least one RC element in an integrated circuit to a preset value, using a first reference RC element with a first resistor and a first capacitor, and a second reference RC element with a second resistor and a second capacitor, which elements are oppositely connected between a first and a second supply potential, wherein the product of the resistance value and the capacitance value of the two elements is equal in each case.

The present invention relates to a method and a device for determining the ratio between an RC time constant in an integrated circuit and a set value.

RC networks that have at least one ohmic resistor a capacitor connected thereto are used in many applications. Examples include timing elements or filters. An essential parameter describing the response of such an RC element is its time constant which is derived from the product of the capacitance value of the capacitive component and the resistance value of the ohmic component. Depending on fabrication-related fluctuations and/or the operating conditions under which a circuit including such an RC element is used, this time constant can fluctuate significantly relative to an expected fabrication-specific set value, such that variances (sigma values) of around 6% from the set value commonly occur.

As a result of these fluctuations, it is critically necessary to determine the RC time constant before using a circuit that includes such RC elements so as to be able to calibrate the circuit, whereby, depending on the intended application, this calibration may be required on a one-time basis after fabrication of the circuit including the RC element, or may be required during operation in conjunction with the changing conditions of use.

FIG. 1 is a schematic view of a low-pass filter composed of an RC element, which filter in the example comprises a series circuit with two resistors R10, R20, and, in series with resistors R10, R20, a parallel circuit with multiple capacitors C10, C12, C14, C16, whereby in the example two of the capacitors, C14, C16, can be selectively connected or disconnected in order to calibrate the RC element.

In known methods for determining an RC time constant, charging and discharging processes by the capacitor of an RC element are implemented, where the assumption is made that the RC time constant of any additional RC elements in the circuit will respond in terms of a set value in a manner analogous to that of the measured RC element. The time constant can be determined based on the time required to charge the capacitor of the reference element from a lower reference value up to an upper reference value, or to discharge it from an upper reference value to a lower reference value, together with the knowledge of the upper and lower reference values. The precision with which the time constant can be determined by such methods is a function of the precision with which the required time references and reference voltages are provided. The charge or discharge times determined are always quantified here by the multiple of the clock pulse period of a clock signal serving as the time reference. The precision in determining the time constant here increases with the clock rate of this clock signal and with the increasing duration of the charging and discharging processes. Extending the charge and discharge time can be achieved here only by increasing the time constant of the reference RC element—a step which again requires a larger resistor and/or a larger capacitor, and thus a larger surface area on the chip.

The goal of the invention is therefore to provide a method and device for determining the ratio between the RC time constant of at least one RC element in an integrated circuit and a set value, wherein the most exact determination possible of this ratio may be ensured with a small surface area requirement on the integrated circuit and with low complexity in terms of the circuit.

This goal is achieved by a method according to claim 1 and by a device according to claim 6. Advantageous embodiments of the invention are described in the subclaims. The method according to the invention for determining the ratio between the RC time constant of at least one RC element in an integrated circuit and a set value comprises the following procedural steps:

-   -   providing a first reference RC element with a first resistor and         a first capacitor, and a second RC element with a second         resistor and a second capacitor, which are oppositely connected         in the circuit between a first and a second supply potential,         wherein the product obtained from the resistance value and         capacitance value of the two elements is equal;     -   defining a normalized RC time constant for the two reference RC         elements;     -   implementing successive charge and discharge cycles during a         predetermined evaluation period, wherein the capacitors are         charged in a cycle during a charge time until the potential at a         node common to the first resistor and the first capacitor of the         first reference RC element approximately corresponds to the         potential at a node common to the second resistor and the second         capacitor of the second reference RC element, and whereby the         capacitors are subsequently discharged for a discharge time,         wherein     -   the evaluation period is matched to the normalized RC time         constant in such a way that, assuming the RC time constant of         the reference RC elements corresponds to the normalized RC time         constant, a predetermined number of charge and discharge cycles         can be implemented during this evaluation period;     -   determining the charge and discharge cycles actually         implemented;     -   generating the quotient of the predetermined number and the         determined number in order to provide a measure of the ratio         between the measured RC time constant and the normalized RC time         constant.

The resistors of the two reference elements preferably each have the same resistance values, while the capacitors of the two reference elements each have the same capacitance values—with the result that the product of the resistance value and capacitance value of each of the two reference elements is equal.

In the method according to the invention in which two reference RC elements are provided, and in which a measure of the ratio of the RC time constants of these RC elements to a normalized RC time constant is determined, the fact is exploited that in an integrated circuit comprising resistors and capacitors forming RC elements, the RC time constants of all of the RC elements formed by these resistors and capacitors deviate in the same degree relative to their set value as does the actual RC time constant of the two measured reference elements from the normalized RC time constant of these elements.

The discharge time of the capacitors of the reference RC elements after a charging process is preferably fixed and, as a result, the period of a cycle comprising one charging process and one discharging process for one reference element is composed of a charge time dependent on the RC time constant and a fixed discharge time. If the evaluation period is selected such that during this evaluation period N charge and discharge processes can occur whenever the time constant of the reference elements corresponds to the normalized time constant, then the ratio of this predetermined number N and a number P of the actually occurring charge and discharge processes produces the ratio between the actual time constant and the normalized time constant. If the actual time constant is greater than the normalized time constant, then there are fewer charge and discharge processes, and the ratio between the predetermined number N and the actual number P is thus greater than 1. If the time constant is smaller than the normalized time constant, then more charge and discharge processes occur during the evaluation period, with the result that the ratio of the predetermined number and actual number is less than 1.

A counter is preferably provided to determine the evaluation period, the counter being controlled by a clock signal. At the beginning of the evaluation period, this counter begins to count in time this clock cycle, the evaluation period ending when the counter has increased or decreased its count by one value that corresponds to the quotient of the desired evaluation period and the clock period of the clock signal.

A comparator is preferably provided to evaluate the potentials at the first and second nodes of the reference elements, with output signals from this comparator controlling a counter which is reset at the beginning of the evaluation period and which, at the end of the evaluation period, provides a value corresponding to the number of charge and discharge cycles that have occurred.

One switch each is preferably connected in parallel to the first and second capacitors to discharge the capacitors of the reference elements, with the capacitors being discharged for a predetermined discharge time by these switches depending on the output signal of the comparator.

The device according to the invention for determining the ratio between the RC time constant of at least one RC element in an integrated circuit and a predetermined value comprises the following features:

-   -   in the integrated circuit, a first reference RC element with a         first resistor and a first capacitor, and a second reference RC         element with a second resistor and a second capacitor, which are         oppositely connected between a first and a second supply         potential, with the product of the resistance value and the         capacitance value of the resistors and capacitors for the two         elements being equal in each case;     -   a comparator with a first input connected to a node common to         the first resistor and the first capacitor, and with a second         input connected to a node common to the second resistor and the         second capacitor;     -   a counter, the count of which is increased or decreased by an         output signal from the comparator as clocked within an         evaluation period;     -   first and second discharge circuits which are connected to the         first and second capacitors and are designed to discharge the         first and second capacitors depending on the output signal of         the comparator;     -   means for the logical-circuit-based generation of a quotient         from a set value that represents a measure for a normalized RC         time constant of the reference RC elements and the actual value         which is the actual RC time constant.

The discharge circuits here preferably comprise one switch each, connected in parallel to the first and second capacitors, with these switches being closed, depending on the comparator output signal of the comparator, for a predetermined time period corresponding to the discharge time after an at least approximately identical potential has been detected at the first and second nodes.

The method according to the invention and device according to the invention provide a value that corresponds to the ratio between a normalized time constant and an actual RC time constant of the reference elements. This value can be employed to calibrate the RC elements in an integrated circuit which are, for example, components of filters. If the method according to the invention determines, for example, that the actual RC time constant of the reference elements deviates percentage-wise by a certain amount from a set value, then it can be assumed that the RC time constants of the remaining RC elements in the integrated circuit also deviate by the same amount from their set value. These uniform deviations for all RC elements of an integrated circuit are due to a common process which is subject to manufacturing tolerances, or to environmental conditions which all of the RC elements also experience in common. The information obtained from the ratio of the RC constants of the reference elements to a preset value can be employed to calibrate the other RC elements besides the reference elements present in the integrated circuit.

For example, RC elements in integrated low-pass filters are usually designed such that the capacitor of the RC element is composed of a plurality of capacitors connected in parallel, each of which has the same capacitance value. By knowing the percentage deviation of the RC time constant of such an RC element from a preset value, it is now possible to disconnect or connect some or multiple capacitors in order to compensate for fabrication-related or environmentally related fluctuations so as to be able to set a predetermined value for the RC time constant which determines the corner frequency of a low-pass filter designed as an RC element.

The following discussion presents embodiments to explain the invention in more detail based on the figures.

FIG. 1 is a schematic view of an integrated circuit with an RC element;

FIG. 2 is a circuit with two reference RC elements which are oppositely connected in a circuit between a first and second supply potential;

FIG. 3 shows the characteristics as a function of time for voltages at a first and second circuit node of the circuit in FIG. 2;

FIG. 4 shows an evaluation circuit for determining a ratio of the time constants of the RC elements of FIG. 2 relative to a normalized time constant;

FIG. 5 shows a realized example of an embodiment of a circuit for an RC element to elucidate the calibration of such an RC element depending on the ratio obtained using the method according to the invention between the actual value of an RC time constant of a reference element and a preset value.

Unless otherwise indicated, the same reference notations in the figures identify the same components with the same significance.

In the method according to the invention for determining a ratio between an RC time constant of an RC element in an integrated circuit and a preset value for this time constant, a circuit is provided with a first reference RC element and a second reference RC element in the integrated circuit.

FIG. 2 shows a circuit of this type with a first reference RC element which comprises a series circuit with a first resistor R1 and a first capacitor C1 between a first supply potential VDD and a second supply potential VSS, and with a second reference RC element which comprises a second resistor R2 and a second capacitor C2 between first and second supply potentials VDD, VSS. The two reference elements here are oppositely connected in the circuit between supply potentials VDD, VSS, that is, first resistor R1 and second capacitor C2 are connected in common to first supply potential VDD and first capacitor C1, while first capacitor C1 and second resistor R2 are connected in common to second supply potential VSS.

A differential voltage Vdif can be tapped between a node N1 common to first resistor R1 and first capacitor C1 for the first reference element, and a node N2 common to second resistor R2 and second capacitor C2 for the second reference element, which voltage corresponds to the difference of a voltage Vu through the second resistor R2 against second supply potential VSS and a voltage Vd across first capacitor C1 against second supply potential VSS.

FIG. 3 shows the characteristics as a function of time for this voltage Vu and voltage Vd for a control period which begins in FIG. 3 at time t0 at which the first and second capacitors C1, C2 are completely discharged. In the following discussion, it is assumed that the resistances of switches S1 and S2 to be explained below can be neglected, so that the potential at second node N2 at time t0 corresponds to first supply potential VDD, while the potential at first node N1 corresponds to second supply potential VSS.

The discharge of first and second capacitors C1, C2 is implemented in the embodiment by switches S1, S2 in the form of transistors, the load paths of which are parallel to capacitors C1, C2. These switches S1, S2 are closed before time t0 in order to discharge capacitors C1, C2. When switches S1, S2 are opened at time t0, voltage Vu falls exponentially and voltage Vd rises exponentially. The curve of voltage Vu and the curve of voltage Vd intersect at time tc at which the differential voltage Vdif is zero. At this time: (VDD−VSS)·e ^(−(tc−t0)/τ) +VSS=(VDD−VSS)·(1−e ^(−(tc−t0)/τ))  (1) Here, τ is the time constant for each of the two reference RC elements, where for this time constant τ: τ=R·C,  (2) where R is the resistance value of first and second resistors R1, R2, and C is the capacitance value for the capacitance of first and second capacitors C1, C2.

If one lets Tc=tc−t0, then solving equation (1) for Tc: Tc=τ·ln(1+(VDD−VSS)/(VDD−VSS))=τ·ln 2  (3)

The charge time Tc starting from the discharged state for first and second capacitors C1, C2 up to the parity of voltages Vu and Vd is thus proportional to the RC time constant of the two reference elements. Starting from time tc, at which the differential voltage Vdif is zero, first and second capacitors C1, C2 are discharged for a predetermined time period which is denoted as Tdis in FIG. 3. For the duration Ta of a control cycle, the applicable equation is thus: Ta=Tc+Tdis,  (4) where Tc is a function of the RC time constant τ.

In the method according to the invention, successive charge and discharge cycles are implemented as shown in FIG. 3 during an evaluation period T. The applicable equation for this evaluation period T is: T=N·(ln 2·τn+Tdis).  (5) The term τn here denotes a normalized RC time constant that represents a preset value for the time constant of the reference RC elements as shown in FIG. 2. Evaluation period T is thus selected so that N charge and discharge cycles can be implemented during the evaluation period whenever the time constant for the RC elements corresponds to the normalized time constant:

Assuming that the actual time constant for these reference elements deviates from the normalized value, there are P charge and discharge cycles within the evaluation period P, where P·(ln 2·τ+Tdis)=N·(ln 2·τn+Tdis).  (6)

Given the assumption that time constants τ and τn are significantly larger than discharge time Tdis, from the above equation it follows that: V=P/N=τn/τ.  (7) The ratio between actual time constant T and normalized time constant τn corresponds to the ratio of the predetermined number N and number P of the charge and discharge cycles actually occurring during the evaluation period.

This ratio between the actual time constant and the normalized time constant of the reference elements also applies for the time constants of all other RC elements of the integrated circuit, assuming that the resistors and capacitors used in the RC elements have been fabricated by the same processes and are thus subject to the same fabrication-related fluctuations as the resistors and capacitors of the reference elements.

FIG. 4 illustrates a device implementing the method according to the invention. Besides the already explained reference RC elements with resistors R1, R2 and capacitors C1, C2 that are oppositely connected between the first and second supply potentials VDD, VSS, this device comprises a comparator K, one input terminal of which is connected to node N1 common to first resistor R1 and first capacitor C1, and the other input terminal of which is connected to the node N2 common to second resistor R2 and second capacitor C2. Assuming that the input of comparator K connected to second node N2 is its non-inverting input and the input connected to first node N1 is the inverting input of comparator K, this comparator K supplies an output signal which has a falling edge whenever voltage Vu across second resistor R2 falls below voltage Vd at first capacitor C1, that is, whenever the differential voltage Vdif is momentarily zero. Timing element DEL is connected following comparator K, which element provides an output signal DIS which, after each falling edge of comparator K, has a high level for a time Tdis corresponding to the discharge time so as to close first and second switches S1, S2 for this discharge time Tdis and discharge capacitors C1, C2. It should be pointed out that the timing element DEL can, of course, also be designed to have a high level after each rising edge of the comparator output signal for time Tdis.

This output signal DIS from timing element DEL is fed directly to first switch S1 which for this embodiment is in the form of an n-channel transistor. Second switch S2 is in the form of a p-channel transistor, so that the output signal from timing element DEL is fed inverted through an inverter INV to this switch S2 in order to turn on this transistor S2 during discharge time Tdis.

The output signal from comparator K is additionally fed to a counter 10 which, in time with this comparator output signal KS, is incremented during an evaluation period with every falling edge of this signal. The duration of the evaluation period is specified by a timer signal TS which is provided by a timer 20 and which, for example, has a low level as long as counter 10 is incremented in time with comparator output signal KS.

Timer 20 is, for example, a digital counter designed to increase or decrease its count in time with a clock signal CLK. At the start of an evaluation period, the count is set to zero and the counter is incremented with each clock pulse of the clock signal until a count determining the evaluation period has been reached. Alternatively, the count by the counter is set at the start of the evaluation period to the value determining the evaluation period, and the count is decreased with each clock pulse of the signal until the count has reached zero. The count determining the evaluation period is selected here so that the quotient of the evaluation period and the clock period of the clock signal corresponds to the count up to which incrementing takes place, or down to which decrementing takes place.

The timer provides a timer signal TS which enables counter 10 to be incremented depending on the comparator clock signal KS. This timer signal TS enables counter 10 at the start of the counting operation, and disables counter 10 when the final count for timer 20 has been reached.

The device additionally includes a sequence control system 30 which is connected to counter 10 and timer-counter 20, and which starts the evaluation process, for the purpose of which the timer is set to zero or to the predetermined count, and counter 10 is set to zero.

At the end of the evaluation period determined by timer signal TS, the counter is disabled so as not to be further incremented depending on comparator signal KS, whereby counter 10 maintains its final count P up to the start of the next evaluation period determined by sequence control system 30 and supplies this count at its output.

The evaluation period during which counter 10 is incremented depending on output signal KS from comparator K is matched to the normalized RC time constant and the discharge time in such a way that exactly one predetermined number of charge and discharge cycles is implemented whenever the RC time constant of reference elements R1, C1, R2, C2 corresponds to the normalized RC time constant. If the time constant of the reference elements deviates from the normalized time constant, at the end of the evaluation period a count P is set which deviates from the predetermined number N, where the ratio of count P of the counter at the end of the evaluation period and the predetermined number N corresponds to the ratio of the normalized RC time constant and the actual time constant of the reference elements.

This ratio of the count to the predetermined number is particularly easy to determine if N=2^(n) for the count and counter 10 is in the form of a binary counter with a length of n bits. In this case, the binary count directly represents a measure of the desired ratio between the count of counter 10 and the predetermined numerical value, which measure corresponds, in the manner explained above, to the ratio of the normalized time constant and the actual time constant. The mathematically precise ratio is of course obtained by dividing count P by predetermined number N, this result being obtained when N=2^(n) by a simple “point shift,” that is, an interpretation of the bit for 2^(n) as 2⁰, of the bit for 2^(n−1) as 2⁻¹, etc.

The reciprocal value of this obtained value then corresponds to the ratio of the actual time constant to the normalized RC time constant.

In order to determine a deviation for the final count of counter 10 from the predetermined value, it is possible in this case to delete the MSB when the MSB is one, and to delete the MSB and the two's complement of the remaining value when the MSB is zero.

This ratio determined by the reference RC elements can be employed, for example, to calibrate RC elements in the same integrated circuit as the reference elements, as explained below with reference to FIG. 5.

FIG. 5 shows an RC element, functioning as a low-pass filter, with an adjustable RC time constant, and thus an adjustable frequency response. The RC element comprises a resistor R3 with a resistance value R, and multiple configurations, each with one switch S0, S1, S2, and capacitors C0-C24 connected in series with the respective switches, which capacitors have the capacitance value C. These capacitors are arranged in such a way that switch S0 serves to switch a (2⁰) capacitor C0, switch S1 serves to switch two (=2¹) parallel-connected capacitors C11, C12, and switch S2 serves to switch 4 (=2²) parallel-connected capacitors C21-C24. This arrangement is of course expandable at will, with each of the additional switches serving to switch double the number of parallel-connected capacitors relative to the previous switch. By appropriately controlling switches S0, S1, S2, a time constant τ can be set for this RC element, which constant varies between τ=R·C and τ=7·R·C, and thus the multiple between 1 and 7 of a standardized time constant τ0=R·C. Given n switches, it is thus possible to set a time constant which can vary between τ0 and (2^(n)−1)·τ0.

A control unit 60 controlling switches S0, S1, S2 serves to set the time constant of the illustrated low-pass filter, which control unit supplies a digital data word according to which switches S0, S1, S2 are turned on or off. This digital data word controlling switches S0-S2, and thus determining the time constant, is generated dependent on a user-defined signal E. Using this signal, the user can set the RC time constant, and thus the corner frequency of the low-pass filter, which frequency is proportional to the reciprocal of this RC time constant.

Control unit 60 is additionally supplied with the ratio signal V=P/N in order to correct user-defined signal E depending on this ratio signal so as to produce a desired time constant and thus a desired frequency response.

List of Reference Notations

-   C0-C24 capacitors -   C1, C2 capacitors -   C10, C12, C14, C16 capacitors -   CLK clock signal -   DEL timing element -   INV inverter -   KS comparator -   KS comparator output signal -   N1, N2 circuit nodes -   R1, R2 resistors -   R10, R20 resistors -   R3 resistor -   S1, S2 switches -   S14, S16 switches -   Uin input voltage -   Uout output voltage -   Vd, Vu voltages -   VDD, VSS supply potentials -   Vin input voltage -   Vout output voltage -   10 counter -   20 timer -   30 control circuit -   40 register -   50 divider -   60 control unit -   100 integrated circuit from 

1. Method for determining the ratio of the RC time constant of at least one RC element in an integrated circuit to a preset value, the method comprising: providing a first reference RC element with a first resistor (R1) and a first capacitor (C1), and a second RC element with a second resistor (R2) and a second capacitor (C2), which are oppositely connected in the circuit between a first and second supply potential (VDD, VSS), the product obtained from the resistance value and capacitance value of the resistors (R1, R2) and the capacitors (C1, C2) of the two elements respectively being equal; defining a normalized RC time constant for the two reference RC elements (R1, C1 R2, C2); implementing successive charge and discharge cycles during a predetermined evaluation period, wherein the capacitors (C1, C2) are charged in a cycle during a charge time until the potential at a node (N1) common to the first resistor (R1) and the first capacitor (C1) of the first reference RC element approximately corresponds to the potential at a node (N2) common to the second resistor (R2) and the second capacitor (C2) of the second reference RC element, and whereby the capacitors are subsequently discharged for a discharge time, while the evaluation period is matched to the normalized RC time constant in such a way that, assuming the RC time constant of the reference RC elements corresponds to the normalized RC time constant, a predetermined number (N) of charge and discharge cycles can be implemented during this evaluation period; determining the number (P) of charge and discharge cycles actually implemented; providing a value that corresponds to a quotient of the actual number (P) and the predetermined number (N) in order to provide a measure of the ratio of the normalized RC time constant to the RC time constant of the reference RC elements.
 2. Method according to claim 1, in which the discharge time (Tdis) is fixed.
 3. Method according to claims 1, comprising: providing a clock signal (CLK) with a period duration (Tclk) which corresponds to the quotient of the evaluation time and the predetermined number (N), or which is in an integer divider ratio relative to this quotient; starting a counter counting the clock signal in time with the beginning of the charge and discharge cycles; ending the charge and discharge cycles whenever the counter has increased or decreased its count by a value corresponding to the predetermined number (N), or by a integral multiple of this value.
 4. Method according to claim 1, in which one switch each (S1, S2) is provided in parallel to the first and second capacitors (C1, C2), and a comparator (K) is provided to compare the potentials at the first and second nodes (N1, N2), the switches (S1, S2) being discharged for a predetermined discharge time (Tdis) depending on a comparator signal.
 5. Method according to claim 1, in which the comparator (K) controls a counter (10) which is reset at the beginning of the charge and discharge cycles, and which at the end of the charge and discharge cycles provides a value (P) corresponding to the number of charge and discharge cycles that have occurred.
 6. Device for determining the ratio of the RC time constant of at least one RC element in an integrated circuit to a preset value, comprising: in the integrated circuit, a first reference RC element with a first resistor (R1) and a first capacitor (C1), and a second reference RC element with a second resistor (R2) and a second capacitor (C2), which are oppositely connected between a first and a second supply potential (VDD, VSS), the product of the resistance value and the capacitance value of the resistors (R1, R2) and capacitors (C1, C2) for the two elements being equal in each case; a comparator K with a first input which is connected to a node (N1) common to the first resistor (R1) and the first capacitor (C1), and with a second input which is connected to a node (N2) common to the second resistor (R2) and the second capacitor (C2); a counter (10), the count of which is increased or decreased by an output signal from the comparator (K) as clocked within an evaluation period; a first and second discharge circuit (S1, S2) which are connected to the first and second capacitors (C1, C2) and are designed to discharge the first and second capacitors (C1, C2) depending on the output signal of the comparator; means for the determining a quotient and a set value (N) that represents a measure for a normalized RC time constant of the reference RC elements from the count (P) of the counter (10).
 7. Device according to claim 6, in which the discharge circuits each have switches (S1, S2) connected in parallel to the first and second capacitors (C1, C2).
 8. (Cancelled) 